INF: BX Register Is Popped Twice for a C Interrupt Function

ID Number: Q50518

5.00 5.10 6.00 6.00a 6.00ax 7.00 | 5.00 5.10 6.00 6.00a

MS-DOS | OS/2

Summary:

In Microsoft C versions 5.0, 5.1, 6.0, 6.0a, 6.0ax, and C/C++ version

7.0, the interrupt keyword is used to designate specific C functions

as interrupt service routines and instructs the compiler to generate

appropriate entry and exit instructions.

If you compile code with the /G1 or /G2 option (80186 or 80286 code

generation), then the compiler produces pusha and popa instructions

that save and restore all vital registers.

However, if you compile with the default /G0 (8086 code generation),

then the registers are each explicitly pushed and popped. One

difference, which may at first appear to be a problem in this code, is

that the BX register is popped twice but the SP register is not popped

at all.

This is not a problem. The SP register is saved in the following

instruction sequence:

mov bp, sp

.

. ISR code

.

mov sp, bp

More Information:

The peculiar double popping of BX can be explained by the following:

The registers are pushed AX, CX, DX, BX, SP, BP, SI, DI, DS, ES

(left to right)

The registers are popped AX, CX, DX, BX, BX, BP, SI, DI, DS, ES

(right to left)

Notice that ES receives the old ES; DS the old DS, but BX receives the

old SP, then BX receives the old BX.

The first pop of SP to BX is necessary to remove the previous value of

SP from the stack. The second pop of BX is necessary to restore the

old BX value.

The old value of SP was restored in the "MOV SP,BP" instruction,

which immediately precedes the popping of all the registers.

This ensures that the state of the registers are saved and then

restored in the Interrupt Service Routine.

Additional reference words: 5.00 5.10 6.00 6.00a 6.00ax 7.00