INF: The Lower Order Word of 32-Bit ROP Codes

ID Number: Q74508

3.00

WINDOWS

Summary:

In Chapter 14 of the "Microsoft Windows Device Development Kit Device

Driver Adaptation Guide," the interpretation of the raster operation

(ROP) code is explained. However, only the higher-order word or most-

significant word (MSW) of the 32-bit ROP code is explained. This word

is an index in the ROP table. The use of the lower-order word or

least-significant word (LSW) of the ROP code is not addressed in the

Windows Device Development Kit (DDK).

The LSW of the ROP code may be used by display drivers to assist in

parsing the ROP. A complete explanation of the LSW of the ROP code can

be found in the file COMMENT.BLT, which is included with the DDK

display driver sample source code. This file is found in the directory

that contains the source code for the BitBlt routine. For example, the

file that relates to the VGA/EGA driver is found in the

DISPLAY\4PLANE\BITBLT directory.

Note: The LSW of the ROP code is NOT used by the VGA/EGA, 8514, and

other display drivers distributed by Microsoft. Windows Graphics

Device Interface (GDI) does not process the LSW. GDI simply passes it

to the display driver.

The relevant section from the COMMENT.BLT file is included below.

More Information:

The low-order word in and of itself does not contain enough

information to generate the ROP code. What it contains is:

1. An index specifying which predefined parse sting to use. A parse

string has a format similar to

SDPSDPSD

or

S+SD-PDS

where S, D, and P represent source, destination, and pattern. The

"+" represents a "push", and the "-" represents a "pop". Sixteen of

the 256 ROPs cannot be represented without using "push" and "pop".

2. Amount to rotate the parse string. If the base string is

SDPSDPSD

and an offset of 2 was given, the new base string will be:

PSDPSDSD

3. Five logic operations. The logic operations could be any of the

following:

NOT

XOR

OR

AND

4. A parity bit used to imply a sixth logic operation of NOT. Pairs of

trailing NOTs are discarded since they cancel.

Example 1: 85, 0085 1E05, PDSPnoaxn,

D = not ((((not P) or S) and D) xor P)

1E08 = 00 01 11 10 00 0 001 01

| | | | | | | |

| | | | | | | |___ bias start by 1

| | | | | | |______ use string 1

| | | | | |_________ parity - no trailing NOT

| | | | |____________ Logic operation #1 is a NOT

| | | |_______________ Logic operation #2 is a OR

| | |__________________ Logic operation #3 is a AND

| |_____________________ Logic operation #4 is a XOR

|________________________ Logic operation #5 is a NOT

String #1 is defined as: SPDSPDSP

After the bias, it will be: PDSPDSPS

The number of binary logic operations + 1 gives an index into the new

string of the first operand. In this case, there are three binary

operations, so the first operand will be the fourth element of the

string (P), the second operand will be the third element (S), and so

forth.

Example 2: 71, 0071 1D5C, SSDxPDxaxn,

D = not (((D xor P) and (D xor S)) xor S)

1E08 = 00 01 11 01 01 0 111 00

| | | | | | | |

| | | | | | | |___ don't bias start

| | | | | | |______ use string 7

| | | | | |_________ parity - no trailing NOT

| | | | |____________ Logic operation #1 is a XOR

| | | |_______________ Logic operation #2 is a XOR

| | |__________________ Logic operation #3 is a AND

| |_____________________ Logic operation #4 is a XOR

|________________________ Logic operation #5 is a NOT

String #7 is defined as: S+SD-PDS

The number of binary logic operations + 1 normally gives an index into

the string of the first operand. When a push/pop is involved, this

must be biased by 2 to account for the encoded push/pop. In this case,

there are four binary operations, plus a push and a pop, so the first

operand will be the seventh element of the string (D), the second

operand will be the sixth element (P), and so forth.