This section summarizes the basic design requirements for PCI.
1. All components comply with PCI 2.1
Required
All cards, bridges, and devices that use PCI must be designed to meet the requirements defined in PCI Local Bus Specification, Revision 2.1 (PCI 2.1).
Compliance with this requirement is demonstrated based on the compliance process of the PCI Special Interest Group (SIG).
2. System does not contain ghost cards
Required
A computer must not include any ghost cards, which are cards that do not decode the type 1/type 0 indicator. Such a card will appear on bus 0 as all the buses behind it that use the same IDSEL. Notice that it is acceptable, as defined in PCI 2.1, for a single-function card to decode the IDSEL and AD[1::0] pins and not decode AD[10::8] if the card does not have bit 7 set in the header type. This requirement also excludes, for example, devices that ignore some type 0 transaction bits and therefore appear at multiple device/function addresses.
A PCI card should be visible through hardware configuration access at only one bus/device/function coordinate.
3. System uses standard method to close BAR windows on nonsubtractive decode PCI bridges
Required
PCI-to-PCI bridges must comply with the PCI to PCI Bridge Specification, Revision 1.0. Setting the base address register (BAR) to its maximum value and the limit register to zeros should effectively close the I/O or memory window references in that bridge BAR.
4. System supports PCI docking through a bridge connector
Recommended
It is recommended that the system support docking through a bridge connector, with the actual bridge on the docking station, not on the mobile unit. The bridge can be positive or subtractive decoding. The bridge should create a new bus number so devices behind the bridge are not on the same bus number as other devices in the system.
After a warm dock, the BIOS should not configure the bridge or any other devices in the docking station. That is the responsibility of the operating system.
The PCI-to-ISA bridge should be placed on the docking station, not on the mobile unit. Mobile PCs typically do not have ISA expansion slots, and the ISA devices on the mobile PC can be controlled by the Plug and Play interface. For more information on requirements for docking station systems, see the “Basic PC 98” chapter in Part 2 of this guide.
Notice that implementing delayed transactions for PCI-to-PCI and PCI-to-ISA docking bridges is required in PCI 2.1 only when certain timing conditions are not met. For PC 98 design requirements, PCI 2.1 is interpreted to mean that delayed transactions are required only when “targets cannot complete the initial data phase within the requirements of this specification” (as stated in PCI 2.1). Delayed transactions are a hardware-related timing issue (and will provide a performance advantage), but are not related to operating system requirements.
5. PCI chip sets support Ultra DMA/33
Required
PCI chip sets must implement DMA as defined in SFF 8020i and must implement Ultra DMA/33 (also known as Ultra-ATA) as defined in the specification submitted by Quantum Corporation for inclusion in the ATA-4 specification.
Ultra DMA/33 is required to avoid the bottleneck created by the current 16.6-Mb/s limit on disk transfer. Ultra DMA/33 also provides error checking for improved robustness over previous IDE implementations.