Syntax
addt $s_reg1, $s_reg2, $d_reg
addt $d_reg/$s_reg1, $s_reg2
Description
Add T_floating adds the contents of $s_reg1 or $d_reg to the contents of $s_reg2 and places the result in $d_reg. When the sum of two operands is exactly 0, the sum has a positive sign for all rounding modes except round toward minus infinity (-¥). For that rounding mode, the sum has a negative sign.
Qualifiers
The following table describes the qualifiers for the addt instructions:
| Instruction | Qualifier description |
| no qualifier | IEEE Rounding Mode: Normal rounding |
| IEEE Trap Mode: Imprecise, integer overflow disabled, inexact disabled | |
| addtc | IEEE Rounding Mode: Chopped |
| addtm | IEEE Rounding Mode: Minus infinity |
| addtd | IEEE Rounding Mode: Plus infinity (ensure that the dyn field of the FPCR is 11) |
| addtu | IEEE Trap Mode: Imprecise, underflow enabled, inexact disabled |
| addtuc | IEEE Trap Mode: Underflow enabled |
| IEEE Rounding Mode: Chopped | |
| addtum | Combined meanings of addtu and addtm |
| addtud | Combined meanings of addtu and addtd |
| addtsu | IEEE Trap Mode: Software, underflow enabled, inexact disabled |
| addtsuc | Combined meanings of addts, addtu, and addtc |
| addtsum | Combined meanings of addts, addtu, and addtm |
| addtsud | Combined meanings of addts, addtu, and addtd |
| addtsui | IEEE Trap Mode: Software, underflow enabled, inexact enabled |
| addtsuic | Combined meanings of addtsui and addtc |
| addtsuim | Combined meanings of addtsui and addtm |