Architecture Mask (amask)

Syntax

amask s_reg, d_reg

amask val_immed, d_reg

Description

The value of the contents of s_reg or the immediate value represents a mask of architectural extensions whose presence or absence is being tested. Bits become cleared if they correspond to architectural extensions that are present, and the result is placed in the destination register. To test for the presence of all architectural extensions, place the value 1 in each bit of either s_reg or the immediate value. The bits in d_reg that contain 0 after the instruction has executed correspond to the architectural extensions that are present.

The correspondence between bits and supported architectural extensions is as follows:

Bit Architectural extension
0 Byte/word extension (BWX)

The instructions that the BWX extension comprises are LDBU, LDWU, SEXTB, SEXTW, STB, and STW.

1 Count extension (CIX)

The instructions that the CIX extension comprises are CTLZ, CTPOP, CTTZ, FTOIS, FTOIT, ITOFF, ITOFS, ITOFT, SQRTF, SQRTG, SQRTS, and SQRTT.

8 Multimedia extension (MAX)

The instructions that the MAX extension comprises are MAXSB8, MAXSW4, MAXUB8, MAXUW4, MINSB8, MINSW4, MINUB8, MINUW4, PERR, PKLB, PKWB, UNPKBL, and UNPKBW.


Note   Use amask to make decisions about what instructions are available. Use implver to make decisions about how best to tune your code.