Syntax
cvtts $s_reg, $d_reg
cvtts $d_reg/$s_reg
Description
Convert T_floating to S_floating converts the T_floating contents of $s_reg to the S_floating precision, rounds according to the rounding mode, and places the result in $d_reg. If an overflow occurs, an unpredictable value is stored in $d_reg and a floating-point trap occurs.
Qualifiers
The following table describes the qualifiers for the cvtts instructions:
| Instruction | Qualifier description |
| no qualifier | IEEE Rounding Mode: Normal rounding |
| IEEE Trap Mode: Imprecise, integer overflow disabled, inexact disabled | |
| cvttsc | IEEE Rounding Mode: Chopped |
| cvttsm | IEEE Rounding Mode: Minus infinity |
| cvttsd | IEEE Rounding Mode: Plus infinity (ensure that the dyn field of the FPCR is 11) |
| cvttsu | IEEE Trap Mode: Imprecise, underflow enabled, inexact disabled |
| cvttsuc | IEEE Trap Mode: Underflow enabled |
| IEEE Rounding Mode: Chopped | |
| cvttsum | Combined meanings of cvttsu and cvttsm |
| cvttsud | Combined meanings of cvttsu and cvttsd |
| cvttssu | IEEE Trap Mode: Software, underflow enabled, inexact disabled |
| cvttssuc | Combined meanings of cvttss, cvttsu, and cvttsc |
| cvttssum | Combined meanings of cvttss, cvttsu, and cvttsm |
| cvttssud | Combined meanings of cvttss, cvttsu, and cvttd |
| cvttssui | IEEE Trap Mode: Software, underflow enabled, inexact enabled |
| cvttssuic | Combined meanings of cvttssui and cvttsc |
| cvttssuim | Combined meanings of cvttssui and cvttsm |