Divide Quadword (divq)

Syntax

divq $s_reg1, $s_reg2, $d_reg

divq $d_reg/$s_reg1, $s_reg2

divq $s_reg1, val_immed, $d_reg

divq $d_reg/$s_reg1, val_immed

Description

Divide Quadword computes the quotient of two signed 64-bit values. This instruction divides the contents of $s_reg1 by the contents of $s_reg2 or the immediate value and then puts the quotient in the destination register.

Overflow is signaled when dividing –9223372036854775808 by -1. A call_pal PAL_gentrap instruction may be issued for either divide-by-zero or overflow.

Note   The assembler destroys the contents of temporary registers $at, $t9, $t10, $t11, and $t12 for this instruction.