Load Quadword Locked (ldq_l)

Syntax

ldq_l $d_reg, address

Description

Load Quadword Locked loads the destination register with the contents of the quadword specified by the effective address. All bytes of the register are replaced with the contents of the loaded quadword.

If the effective address is not evenly divisible by 8, a data alignment exception is signaled.

If an ldq_l instruction executes without faulting, the processor records the target physical address in a per-processor locked-physical-address register and sets the per-processor lock flag. If the per-processor lock flag is still set when a Store Quadword Conditional (stq_c) instruction is executed, the store occurs; otherwise, it does not occur.

See Also

Atomic Updates