Syntax
muls $s_reg1, $s_reg2, $d_reg
muls $d_reg/$s_reg1, $s_reg2
Description
Multiply S_floating multiplies the contents of $s_reg1 or $d_reg by the contents of $s_reg2 and stores the results in $d_reg. The product is rounded according to the appropriate rounding mode. The single-precision operation on canonical single-precision values produces a canonical single-precision result.
Qualifiers
The following table describes the qualifiers for the muls instructions:
| Instruction | Qualifier description |
| no qualifier | IEEE Rounding Mode: Normal rounding |
| IEEE Trap Mode: Imprecise, integer overflow disabled, inexact disabled | |
| mulsc | IEEE Rounding Mode: Chopped |
| mulsm | IEEE Rounding Mode: Minus infinity |
| mulsd | IEEE Rounding Mode: Plus infinity (ensure that the dyn field of the FPCR is 11) |
| mulsu | IEEE Trap Mode: Imprecise, underflow enabled, inexact disabled |
| mulsuc | IEEE Trap Mode: Underflow enabled |
| IEEE Rounding Mode: Chopped | |
| mulsum | Combined meanings of mulsu and mulsm |
| mulsud | Combined meanings of mulsu and mulsd |
| mulssu | IEEE Trap Mode: Software, underflow enabled, inexact disabled |
| mulssuc | Combined meanings of mulss, mulsu, and mulsc |
| mulssum | Combined meanings of mulss, mulsu, and mulsm |
| mulssud | Combined meanings of mulss, mulsu, and mulsd |
| mulssui | IEEE Trap Mode: Software, underflow enabled, inexact enabled |
| mulssuic | Combined meanings of mulssui and mulsc |
| mulssuim | Combined meanings of mulssui and mulsm |