Miniport NIC drivers for busmaster DMA devices must allocate shared memory for use by the NIC and the NIC driver. Special precautions are necessary when sharing cached memory between such a driver and its NIC. On certain architectures, specific steps must be taken to insure that the memory is coherent because the NIC can access the shared physical memory directly, while the NIC driver accesses memory through the cache. This can cause differences in what the driver and the NIC detect in memory, even if they look at the same location.
The use of noncached shared memory avoids most of the problems associated with cached shared memory. However, noncached memory is a scarce system resource and allocation of such memory can be limited. When data written to physical memory must use a small write queue, even noncached data might not appear in physical memory immediately. Additionally, there are cases when using noncached memory is neither recommended nor possible. For example, data that the NIC driver reads repeatedly should always be cached to improve performance. Or, as another example, a NIC driver might be required to pass a received data packet to a number of different protocol drivers. Cached memory would be highly recommended in these cases. The NIC driver should also use cached memory for any data passed in by a protocol driver.
NdisMAllocateSharedMemory can be called by a busmaster NIC driver to allocate memory for permanent sharing between the network adapter and the NIC driver. This function returns a virtual address and a physical address for the shared memory. The addresses are valid until a call to NdisMFreeSharedMemory frees the memory.
When shared cached memory is used, NDIS provides a function that must be called by the NIC driver to insure coherency between what the NIC sees and what the NIC driver sees. Before accessing the shared memory on a send or on a receive, the NIC driver must call NdisFlushBuffer and also NdisMUpdateSharedMemory to ensure cache coherence.