16.5  Maintaining Cache Coherency for DMA and PIO

In Windows NT machines, data can be cached in one or more processor caches and/or in the system DMA controller’s cache when a driver is transferring data between system memory and its device. NT drivers that use DMA or PIO to service read/write IRPs or any device I/O control request that requires a DMA or PIO data transfer operation should ensure the integrity of possibly cached data during transfer operations as explained in the following subsections.