5.2. COFF Relocations (Object Only)

Object files contain COFF relocations, which specify how the section data should be modified when placed in the image file and subsequently loaded into memory.

Image files do not contain COFF relocations, because all symbols referenced have already been assigned addresses in a flat address space. An image contains relocation information in the form of base relocations in the .reloc section (unless the image has the IMAGE_FILE_RELOCS_STRIPPED attribute). See Section 6.5 for more information.

For each section in an object file, there is an array of fixed-length records that are the section’s COFF relocations. The position and length of the array are specified in the section header. Each element of the array has the following format:

Offset Size Field Description
0 4 VirtualAddress Address of the item to which relocation is applied: this is the offset from the beginning of the section, plus the value of the section’s RVA/Offset field (see Section 4, “Section Table.”). For example, if the first byte of the section has an address of 0x10, the third byte has an address of 0x12.
4 4 SymbolTableIndex A zero-based index into the symbol table. This symbol gives the address to be used for the relocation. If the specified symbol has section storage class, then the symbol’s address is the address with the first section of the same name.
8 2 Type A value indicating what kind of relocation should be performed. Valid relocation types depend on machine type. See Section 5.2.1, “Type Indicators.”

If the symbol referred to (by the SymbolTableIndex field) has storage class IMAGE_SYM_CLASS_SECTION, the symbol’s address is the beginning of the section. The section is usually in the same file, except when the object file is part of an archive (library). In that case, the section may be found in any other object file in the archive that has the same archive-member name as the current object file. (The relationship with the archive-member name is used in the linking of import tables, i.e. the .idata section.)

5.2.1. Type Indicators

The Type field of the relocation record indicates what kind of relocation should be performed. Different relocation types are defined for each type of machine.

Intel 386™

The following relocation type indicators are defined for Intel386 and compatible processors:

Constant Value Description
IMAGE_REL_I386_ABSOLUTE 0x0000 This relocation is ignored.
IMAGE_REL_I386_DIR16 0x0001 Not supported.
IMAGE_REL_I386_REL16 0x0002 Not supported.
IMAGE_REL_I386_DIR32 0x0006 The target’s 32-bit virtual address.
IMAGE_REL_I386_DIR32NB 0x0007 The target’s 32-bit relative virtual address.
IMAGE_REL_I386_SEG12 0x0009 Not supported.
IMAGE_REL_I386_SECTION 0x000A The 16-bit-section index of the section containing the target. This is used to support debugging information.
IMAGE_REL_I386_SECREL 0x000B The 32-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.
IMAGE_REL_I386_REL32 0x0014 The 32-bit relative displacement to the target. This supports the x86 relative branch and call instructions.

MIPS Processors

The following relocation type indicators are defined for MIPS processors:

Constant Value Description
IMAGE_REL_MIPS_ABSOLUTE 0x0000 This relocation is ignored.
IMAGE_REL_MIPS_REFHALF 0x0001 The high 16 bits of the target’s 32-bit virtual address.
IMAGE_REL_MIPS_REFWORD 0x0002 The target’s 32-bit virtual address.
IMAGE_REL_MIPS_JMPADDR 0x0003 The low 26 bits of the target’s virtual address. This supports the MIPS J and JAL instructions.
IMAGE_REL_MIPS_REFHI 0x0004 The high 16 bits of the target’s 32-bit virtual address. Used for the first instruction in a two-instruction sequence that loads a full address. This relocation must be immediately followed by a PAIR relocations whose SymbolTableIndex contains a signed 16-bit displacement which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_MIPS_REFLO 0x0005 The low 16 bits of the target’s virtual address.
IMAGE_REL_MIPS_GPREL 0x0006 16-bit signed displacement of the target relative to the Global Pointer (GP) register.
IMAGE_REL_MIPS_LITERAL 0x0007 Same as IMAGE_REL_MIPS_GPREL.
IMAGE_REL_MIPS_SECTION 0x000A The 16-bit section index of the section containing the target. This is used to support debugging information.
IMAGE_REL_MIPS_SECREL 0x000B The 32-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.
IMAGE_REL_MIPS_SECRELLO 0x000C The low 16 bits of the 32-bit offset of the target from the beginning of its section.
IMAGE_REL_MIPS_SECRELHI 0x000D The high 16 bits of the 32-bit offset of the target from the beginning of its section. A PAIR relocation must immediately follow this on. The SymbolTableIndex of the PAIR relocation contains a signed 16-bit displacement, which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_MIPS_JMPADDR16 0x0010 The low 26 bits of the target’s virtual address. This supports the MIPS16 JAL instruction.
IMAGE_REL_MIPS_REFWORDNB 0x0022 The target’s 32-bit relative virtual address.
IMAGE_REL_MIPS_PAIR 0x0025 This relocation is only valid when it immediately follows a REFHI or SECRELHI relocation. Its SymbolTableIndex contains a displacement and not an index into the symbol table.

Alpha Processors

The following relocation Type indicators are defined for Alpha processors:

Constant Value Description
IMAGE_REL_ALPHA_ABSOLUTE 0x0000 This relocation is ignored.
IMAGE_REL_ALPHA_REFLONG 0x0001 The target’s 32-bit virtual address. This fixup is illegal in a PE32+ image unless the image has been sandboxed by clearing the IMAGE_FILE_LARGE_ADDRESS_AWARE bit in the File Header.
IMAGE_REL_ALPHA_REFQUAD 0x0002 The target’s 64-bit virtual address.
IMAGE_REL_ALPHA_GPREL32 0x0003 32-bit signed displacement of the target relative to the Global Pointer (GP) register.
IMAGE_REL_ALPHA_LITERAL 0x0004 16-bit signed displacement of the target relative to the Global Pointer (GP) register.
IMAGE_REL_ALPHA_LITUSE 0x0005 Reserved for future use.
IMAGE_REL_ALPHA_GPDISP 0x0006 Reserved for future use.
IMAGE_REL_ALPHA_BRADDR 0x0007 The 21-bit relative displacement to the target. This supports the Alpha relative branch instructions.
IMAGE_REL_ALPHA_HINT 0x0008 14-bit hints to the processor for the target of an Alpha jump instruction.
IMAGE_REL_ALPHA_INLINE_REFLONG 0x0009 The target’s 32-bit virtual address split into high and low 16-bit parts. Either an ABSOLUTE or MATCH relocation must immediately follow this relocation. The high 16 bits of the target address are stored in the location identified by the INLINE_REFLONG relocation. The low 16 bits are stored four bytes later if the following relocation is of type ABSOLUTE or at a signed displacement given in the SymbolTableIndex if the following relocation is of type MATCH.
IMAGE_REL_ALPHA_REFHI 0x000A The high 16 bits of the target’s 32-bit virtual address. Used for the first instruction in a two-instruction sequence that loads a full address. This relocation must be immediately followed by a PAIR relocations whose SymbolTableIndex contains a signed 16-bit displacement which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_ALPHA_REFLO 0x000B The low 16 bits of the target’s virtual address.
IMAGE_REL_ALPHA_PAIR 0x000C This relocation is only valid when it immediately follows a REFHI , REFQ3, REFQ2, or SECRELHI relocation. Its SymbolTableIndex contains a displacement and not an index into the symbol table.
IMAGE_REL_ALPHA_MATCH 0x000D This relocation is only valid when it immediately follows INLINE_REFLONG relocation. Its SymbolTableIndex contains the displacement in bytes of the location for the matching low address and not an index into the symbol table.
IMAGE_REL_ALPHA_SECTION 0x000E The 16-bit section index of the section containing the target.  This is used to support debugging information.
IMAGE_REL_ALPHA_SECREL 0x000F The 32-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.
IMAGE_REL_ALPHA_REFLONGNB 0x0010 The target’s 32-bit relative virtual address.
IMAGE_REL_ALPHA_SECRELLO 0x0011 The low 16 bits of the 32-bit offset of the target from the beginning of its section.
IMAGE_REL_ALPHA_SECRELHI 0x0012 The high 16 bits of the 32-bit offset of the target from the beginning of its section. A PAIR relocation must immediately follow this on. The SymbolTableIndex of the PAIR relocation contains a signed 16-bit displacement which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_ALPHA_REFQ3 0x0013 The low 16 bits of the high 32 bits of the target’s 64-bit virtual address. This relocation must be immediately followed by a PAIR relocations whose SymbolTableIndex contains a signed 32-bit displacement which is added to the 16 bits taken from the location being relocated. The 16 bits in the relocated location are shifted left by 32 before this addition.
IMAGE_REL_ALPHA_REFQ2 0x0014 The high 16 bits of the low 32 bits of the target’s 64-bit virtual address. This relocation must be immediately followed by a PAIR relocations whose SymbolTableIndex contains a signed 16-bit displacement which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_ALPHA_REFQ1 0x0015 The low 16 bits of the target’s 64-bit virtual address.
IMAGE_REL_ALPHA_GPRELLO 0x0016 The low 16 bits of the 32-bit signed displacement of the target relative to the Global Pointer (GP) register.
IMAGE_REL_ALPHA_GPRELHI 0x0017 The high 16 bits of the 32-bit signed displacement of the target relative to the Global Pointer (GP) register.

IBM PowerPC Processors

The following relocation Type indicators are defined for PowerPC processors:

Constant Value Description
IMAGE_REL_PPC_ABSOLUTE 0x0000 This relocation is ignored.
IMAGE_REL_PPC_ADDR64 0x0001 The target’s 64-bit virtual address.
IMAGE_REL_PPC_ADDR32 0x0002 The target’s 32-bit virtual address.
IMAGE_REL_PPC_ADDR24 0x0003 The low 24 bits of the target’s virtual address. This is only valid when the target symbol is absolute and can be sign extended to its original value.
IMAGE_REL_PPC_ADDR16 0x0004 The low 16 bits of the target’s virtual address.
IMAGE_REL_PPC_ADDR14 0x0005 The low 14 bits of the target’s virtual address. This is only valid when the target symbol is absolute and can be sign extended to its original value.
IMAGE_REL_PPC_REL24 0x0006 A 24-bit PC-relative offset to the symbol’s location.
IMAGE_REL_PPC_REL14 0x0007 A 14-bit PC-relative offset to the symbol’s location.
IMAGE_REL_PPC_ADDR32NB 0x000A The target’s 32-bit relative virtual address.
IMAGE_REL_PPC_SECREL 0x000B The 32-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.
IMAGE_REL_PPC_SECTION 0x000C The 16-bit section index of the section containing the target. This is used to support debugging information.
IMAGE_REL_PPC_SECREL16 0x000F The 16-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.
IMAGE_REL_PPC_REFHI 0x0010 The high 16 bits of the target’s 32-bit virtual address. Used for the first instruction in a two-instruction sequence that loads a full address. This relocation must be immediately followed by a PAIR relocations whose SymbolTableIndex contains a signed 16-bit displacement which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_PPC_REFLO 0x0011 The low 16 bits of the target’s virtual address.
IMAGE_REL_PPC_PAIR 0x0012 This relocation is only valid when it immediately follows a REFHI or SECRELHI relocation. Its SymbolTableIndex contains a displacement and not an index into the symbol table.
IMAGE_REL_PPC_SECRELLO 0x0013 The low 16 bits of the 32-bit offset of the target from the beginning of its section.
IMAGE_REL_PPC_SECRELHI 0x0014 The high 16 bits of the 32-bit offset of the target from the beginning of its section. A PAIR relocation must immediately follow this on. The SymbolTableIndex of the PAIR relocation contains a signed 16-bit displacement which is added to the upper 16 bits taken from the location being relocated.
IMAGE_REL_PPC_GPREL 0x0015 16-bit signed displacement of the target relative to the Global Pointer (GP) register.

Hitachi SuperH Processors

The following relocation type indicators are defined for SH3 and SH4 processors:

Constant Value Description
IMAGE_REL_SH3_ABSOLUTE 0x0000 This relocation is ignored.
IMAGE_REL_SH3_DIRECT16 0x0001 Reference to the 16-bit location that contains the virtual address of the target symbol.
IMAGE_REL_SH3_DIRECT32 0x0002 The target’s 32-bit virtual address.
IMAGE_REL_SH3_DIRECT8 0x0003 Reference to the 8-bit location that contains the virtual address of the target symbol.
IMAGE_REL_SH3_DIRECT8_WORD 0x0004 Reference to the 8-bit instruction that contains the effective 16-bit virtual address of the target symbol.
IMAGE_REL_SH3_DIRECT8_LONG 0x0005 Reference to the 8-bit instruction that contains the effective 32-bit virtual address of the target symbol.
IMAGE_REL_SH3_DIRECT4 0x0006 Reference to the 8-bit location whose low 4 bits contain the virtual address of the target symbol.
IMAGE_REL_SH3_DIRECT4_WORD 0x0007 Reference to the 8-bit instruction whose low 4 bits contain the effective 16-bit virtual address of the target symbol.
IMAGE_REL_SH3_DIRECT4_LONG 0x0008 Reference to the 8-bit instruction whose low 4 bits contain the effective 32-bit virtual address of the target symbol.
IMAGE_REL_SH3_PCREL8_WORD 0x0009 Reference to the 8-bit instruction which contains the effective 16-bit relative offset of the target symbol.
IMAGE_REL_SH3_PCREL8_LONG 0x000A Reference to the 8-bit instruction which contains the effective 32-bit relative offset of the target symbol.
IMAGE_REL_SH3_PCREL12_WORD 0x000B Reference to the 16-bit instruction whose low 12 bits contain the effective 16-bit relative offset of the target symbol.
IMAGE_REL_SH3_STARTOF_SECTION 0x000C Reference to a 32-bit location that is the virtual address of the symbol’s section.
IMAGE_REL_SH3_SIZEOF_SECTION 0x000D Reference to the 32-bit location that is the size of the symbol’s section.
IMAGE_REL_SH3_SECTION 0x000E The 16-bit section index of the section containing the target. This is used to support debugging information.
IMAGE_REL_SH3_SECREL 0x000F The 32-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.
IMAGE_REL_SH3_DIRECT32_NB 0x0010 The target’s 32-bit relative virtual address.

ARM Processors

The following relocation Type indicators are defined for ARM processors:

Constant Value Description
IMAGE_REL_ARM_ABSOLUTE 0x0000 This relocation is ignored.
IMAGE_REL_ARM_ADDR32 0x0001 The target’s 32-bit virtual address.
IMAGE_REL_ARM_ADDR32NB 0x0002 The target’s 32-bit relative virtual address.
IMAGE_REL_ARM_BRANCH24 0x0003 The 24-bit relative displacement to the target.
IMAGE_REL_ARM_BRANCH11 0x0004 Reference to a subroutine call, consisting of two 16-bit instructions with 11-bit offsets.
IMAGE_REL_ARM_SECTION 0x000E The 16-bit section index of the section containing the target. This is used to support debugging information.
IMAGE_REL_ARM_SECREL 0x000F The 32-bit offset of the target from the beginning of its section. This is used to support debugging information as well as static thread local storage.